embodied-efficiency
Kernels, quantization, and a runtime safety layer for vision-language-action models, so they run inside a real latency budget. Problem: a VLA can do the task but runs at 3 to 5 Hz, and a robot arm needs 50 to 100 Hz. Solution: capture the flow-matching sampler in a CUDA graph, then measure every other lever instead of assuming. Result: one big win, one honest negative, both reported the same way.
Standout metric
5.9x CUDA-graph speedup, 4.82 to 0.82 ms/step on T4
And the negative result: weight-only low-bit bought no batch-1 latency across four experiments, with torchao/Marlin int4 running 1.2 to 1.6x slower than bf16 on an L4.